Sinusoidal Synth
Aug.2020 // A custom PWM Synthesizer coded in VHDL at the logical level on the Basys 3 Artix-7 FPGA platform.
Created in collaboration with Jehan Diaz ‘22 during ENGS 31: Digital Electronics, our Sinusoidal Synth was intended to be integrated with a MIDI keyboard. Unfortunately, the completely remote format of the course made that goal unattainable in the time given and with the resources at our disposable. However, we worked with what we had and fully developed the key functionality without such a polished interface, including octave shifting and un-amplified PWM audio output.
Logic Diagrams
The first step was to diagram out the various logic elements and flows.
Top-Level FPGA Block Diagram
PWM Shell Block Diagram
Digital-Direct-Synthesis Sine Wave Generation Block Diagram + FSM
Note Parsing Block Diagram + FSM
Waveforms
After implementing VHDL that constructed the logic circuits outlined in the block diagrams (see Full Report for VHDL), we validated our functionality through waveform analysis.
Topmost Shell Waveform Octave-Switching Behavior
Topmost Shell Waveform 1
Digital-Direct-Synthesis Top Shell Waveform
Topmost Shell Waveform 2
Note Parsing Shell Waveform
Parsing Controller Waveform
Parsing Datapath Waveform
Sine Wave Generation Waveform 1
Sine Wave Generation Waveform 2